Optimum State Assignment for Synchronous Sequential Circuits
IEEE Transactions on Computers
Remarks on the SHR-Optimal State Assignment Procedure
IEEE Transactions on Computers
Optimum State Assignment for the D Flip-Flop
IEEE Transactions on Computers
On the number of distinct state assignments for a sequential machine
IEEE Transactions on Computers
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In a recently published article, Story et al. detailed an organized search process leading to the optimum state assignment for a synchronous sequential machine. Their procedure begins with the calculation of a set of lower bounds (minimum numbers) on the costs of the excitation logic required for each possible distinct partial state assignment.