Information Theory and Reliable Communication
Information Theory and Reliable Communication
A Cellular-Array Multiplier for GF(2m)
IEEE Transactions on Computers
Computer
Galois Switching Functions and Their Applications
IEEE Transactions on Computers
Integer Division in Linear Time with Bounded Fan-In
IEEE Transactions on Computers
VLSI implementation of public-key encryption algorithms
Proceedings on Advances in cryptology---CRYPTO '86
A New Algorithm for Multiplication in Finite Fields
IEEE Transactions on Computers
New Parallel Architecture for Modular Multiplication and Squaring Based on Cellular Automata
PARA '02 Proceedings of the 6th International Conference on Applied Parallel Computing Advanced Scientific Computing
Low Complexity Bit Serial Systolic Multipliers over GF(2m) for Three Classes of Finite Fields
ICICS '02 Proceedings of the 4th International Conference on Information and Communications Security
Parallel Algorithm and Architecture for Public-Key Cryptosystem
EurAsia-ICT '02 Proceedings of the First EurAsian Conference on Information and Communication Technology
Area Efficient Exponentiation Using Modular Multiplier/Squarer in GF(2m
COCOON '01 Proceedings of the 7th Annual International Conference on Computing and Combinatorics
Low-complexity bit-parallel systolic multipliers over GF(2m)
Integration, the VLSI Journal
Versatile multiplier architectures in GF(2k) fields using the Montgomery multiplication algorithm
Integration, the VLSI Journal
Multiplexer-based bit-parallel systolic multipliers over GF(2m)
Computers and Electrical Engineering
Semi-systolic Modular Multiplier over GF(2m)
ICCSA '08 Proceedings of the international conference on Computational Science and Its Applications, Part II
Digit-Serial Structures for the Shifted Polynomial Basis Multiplication over Binary Extension Fields
WAIFI '08 Proceedings of the 2nd international workshop on Arithmetic of Finite Fields
Computers and Electrical Engineering
Unified parallel systolic multiplier over GF(2m)
Journal of Computer Science and Technology
Low-complexity bit-parallel multiplier over GF(2m) using dual basis representation
Journal of Computer Science and Technology
Systolic product-sum circuit for GF((22)m) using neuron MOSFETs
Integration, the VLSI Journal
Time-space efficient exponentiation over GF(2m)
ICCSA'03 Proceedings of the 2003 international conference on Computational science and its applications: PartI
Fast exponentiaion over GF(2m) based on cellular automata
ICCS'03 Proceedings of the 2003 international conference on Computational science: PartII
Galois field hardware architectures for network coding
Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
On efficient implementation of accumulation in finite field over GF(2m) and its applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient semisystolic architectures for finite-field arithmetic
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ICCSA'05 Proceedings of the 2005 international conference on Computational Science and its Applications - Volume Part I
Semi-systolic architecture for modular multiplication over GF(2m)
ICCS'05 Proceedings of the 5th international conference on Computational Science - Volume Part III
Low complexity systolic architecture for modular multiplication over GF(2m)
ICCS'06 Proceedings of the 6th international conference on Computational Science - Volume Part I
Unidirectional two dimensional systolic array for multiplication in GF(2m) using LSB first algorithm
WILF'05 Proceedings of the 6th international conference on Fuzzy Logic and Applications
VLSI architecture for bit parallel systolic multipliers for special class of GF(2m) using dual bases
VDAT'12 Proceedings of the 16th international conference on Progress in VLSI Design and Test
Low latency systolic montgomery multiplier for finite field GF(2m) based on pentanomials
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hi-index | 14.99 |
Two systolic architectures are developed for performing the product-sum computation AB + C in the finite field GF(2m) of 2melements, where A, B, and C are arbitrary elements of GF(2m). The first multiplier is a serial-in, serial-out one-dimensional systolic array, while the second multiplier is a parallel-in, parallel-out two-dimensional systolic array. The first m