The delay of synchronous logic nets
ACM '64 Proceedings of the 1964 19th ACM national conference
Algebraic structure theory of sequential machines (Prentice-Hall international series in applied mathematics)
Universal Modules for Bounded Signal Fan-Out Synchronous Sequential Circuits
IEEE Transactions on Computers
A Scheme for Synchronizing High-Speed Logic Part II
IEEE Transactions on Computers
Universal two state machines: Characterization theorems and decomposition schemes
SWAT '68 Proceedings of the 9th Annual Symposium on Switching and Automata Theory (swat 1968)
Iteratively realized sequential circuits
SWAT '68 Proceedings of the 9th Annual Symposium on Switching and Automata Theory (swat 1968)
A Scheme for Synchronizing High-Speed Logic: Part I
IEEE Transactions on Computers
Modular decomposition of synchronous sequential machines
FOCS '67 Proceedings of the 8th Annual Symposium on Switching and Automata Theory (SWAT 1967)
On single-loop realizations of automata
FOCS '65 Proceedings of the 6th Annual Symposium on Switching Circuit Theory and Logical Design (SWCT 1965)
Synchronous Sequential Machines: A Modular and Testable Design
IEEE Transactions on Computers
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This paper is concerned with the high rate realization of finite-state machines. Two new techniques for high rate realization of finite-state machines are presented, one applicable to finite, the other to infinite memory span machines. It is found that any finite-state machine can be realized by a tree of component machines of a proper size with a given high rate, where the propagation delay of the component machine is less than or equal to the reciprocal of the given high rate. For a given set of logic devices, a synthesis procedure for the component machine with a given propagation delay is proposed.