Some Complexity Results for Matrix Computations on Parallel Processors
Journal of the ACM (JACM)
Structure of Computers and Computations
Structure of Computers and Computations
Minimization of interprocessor communication in parallel computation
Minimization of interprocessor communication in parallel computation
Principles of Compiler Design (Addison-Wesley series in computer science and information processing)
Principles of Compiler Design (Addison-Wesley series in computer science and information processing)
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers
Task Allocation and Precedence Relations for Distributed Real-Time Systems
IEEE Transactions on Computers
Hi-index | 14.98 |
This paper is concerned with minimizing the delay due to data communication during the execution of a parallel algorithm on an SIMD computer with a two-way circular unit-shift interconnection network. Algorithms are developed which determine, for a given parallel procedure, the order of computation within that procedure, for every parallel arithmetic expression, the alignment of operands for every binary operation, and the mapping and remapping of data into physical memories so that the communication cost is minimized. The proposed algorithms are applicable to array variables with special types of index functions.