Bounded Model Checking Using Satisfiability Solving
Formal Methods in System Design
Counter-Example Based Predicate Discovery in Predicate Abstraction
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Automatically proving the correctness of compiler optimizations
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Design and Results of the First Satisfiability Modulo Theories Competition (SMT-COMP 2005)
Journal of Automated Reasoning
AI Communications - CASC
Boogie: a modular reusable verifier for object-oriented programs
FMCO'05 Proceedings of the 4th international conference on Formal Methods for Components and Objects
SMT techniques for fast predicate abstraction
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
TVOC: a translation validator for optimizing compilers
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Data structure specifications via local equality axioms
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Model checking for the practical verificationist: a user's perspective on SAL
Proceedings of the second workshop on Automated formal methods
Safety Guarantees from Explicit Resource Management
Formal Methods for Components and Objects
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The Satisfiability Modulo Theories Competition (SMT-COMP) arose from the SMT-LIB initiative to spur adoption of common, community-designed formats, and to spark further advances in satisfiability modulo theories (SMT). The first SMT-COMP was held in 2005 as a satellite event of CAV 2005. SMT-COMP 2006 was held August 17---19, 2006, as a satellite event of CAV 2006. This paper describes the rules and competition format for SMT-COMP 2006, the benchmarks used, the participants, and the results.