Use of elliptic curves in cryptography
Lecture notes in computer sciences; 218 on Advances in cryptology---CRYPTO 85
Elliptic curves in cryptography
Elliptic curves in cryptography
A method for obtaining digital signatures and public-key cryptosystems
Communications of the ACM
Elliptic curve cryptography on smart cards without coprocessors
Proceedings of the fourth working conference on smart card research and advanced applications on Smart card research and advanced applications
Handbook of Applied Cryptography
Handbook of Applied Cryptography
DFT/FFT and Convolution Algorithms: Theory and Implementation
DFT/FFT and Convolution Algorithms: Theory and Implementation
Optimal Extension Fields for Fast Arithmetic in Public-Key Algorithms
CRYPTO '98 Proceedings of the 18th Annual International Cryptology Conference on Advances in Cryptology
A Scalable Dual-Field Elliptic Curve Cryptographic Processor
IEEE Transactions on Computers
Hardware architectures for public key cryptography
Integration, the VLSI Journal
ISCIS'06 Proceedings of the 21st international conference on Computer and Information Sciences
Efficient hardware implementation of elliptic curve cryptography over GF(pm)
WISA'05 Proceedings of the 6th international conference on Information Security Applications
Optimal Extension Field Inversion in the Frequency Domain
WAIFI '08 Proceedings of the 2nd international workshop on Arithmetic of Finite Fields
Towards efficient arithmetic for lattice-based cryptography on reconfigurable hardware
LATINCRYPT'12 Proceedings of the 2nd international conference on Cryptology and Information Security in Latin America
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We propose a novel area/time efficient elliptic curve cryptography (ECC) processor architecture which performs all finite field arithmetic operations in the discrete Fourier domain. The proposed architecture utilizes a class of optimal extension fields (OEF) GF(qm) where the field characteristic is a Mersenne prime q = 2n - 1 and m = n. The main advantage of our architecture is that it achieves extension field modular multiplication in the discrete Fourier domain with only a linear number of base field GF(q) multiplications in addition to a quadratic number of simpler operations such as addition and bitwise rotation. We achieve an area between 25k and 50k equivalent gates for the implementations over OEFs of size 169, 289 and 361 bits. With its low area and high speed, the proposed architecture is well suited for ECC in small device environments such as sensor networks. The work at hand presents the first hardware implementation of a frequency domain multiplier suitable for ECC and the first hardware implementation of ECC in the frequency domain.