A Memory-Level Parallelism Aware Fetch Policy for SMT Processors

  • Authors:

  • Stijn Everman;Lieven Eeckhout

  • Affiliations:

  • ELIS Department, Ghent University, Belgium. Email: seyerman@elis.UGent.be;ELIS Department, Ghent University, Belgium. Email: leeckhou@elis.UGent.be

  • Venue:
  • HPCA '07 Proceedings of the 2007 IEEE 13th International Symposium on High Performance Computer Architecture
  • Year:
  • 2007

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Abstract

A thread executing on a simultaneous multithreading (SMT) processor that experiences a long-latency load will eventually stall while holding execution resources. Existing long-latency load aware SMT fetch policies limit the amount of resources allocated by a stalled thread by identifying long-latency loads and preventing the given thread from fetching more instructions - and in some implementations, instructions beyond the long-latency load may even be flushed which frees allocated resources. This paper proposes an SMT fetch policy that takes into account the available memory-level parallelism (MLP) in a thread. The key idea proposed in this paper is that in case of an isolated long-latency load, i.e., there is no MLP, the thread should be prevented from allocating additional resources. However, in case multiple independent logn-latency loads overlao, i.e., there is MLP, the thread should allocate as many resources as needed in order to fully expose the available MLP. The proposed MLP-aware fetch policy achieves better performance for MLP-intensive threads on a SMT processor and achieves a better overall balance between performance and fairness than previously proposed fetch policies.