On the decidability of shared memory consistency verification

  • Authors:
  • A. Sezgin;G. Gopalakrishnan

  • Affiliations:
  • Dept. of Comput. Eng., Atilim Univ., Ankara, Turkey;-

  • Venue:
  • MEMOCODE '05 Proceedings of the 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design
  • Year:
  • 2005

Quantified Score

Hi-index 0.00

Visualization

Abstract

We view shared memories as structures, which define relations over the set of programs and their executions. An implementation is modeled by a transducer, where the relation it realizes is its language. This approach allows us to cast shared memory verification as language inclusion. We show that a specification can be approximated by an infinite hierarchy of finite-state transducers, called the memory model machines. Also, checking whether an execution is generated by a sequentially consistent memory is approached through a constraint satisfaction formulation. It is proved that if a memory implementation generates a non interleaved sequential and unambiguous execution, it necessarily generates one such execution of bounded size. Our paper summarizes the key results from the first author's dissertation, and may help a practitioner understand with clarity what "sequential consistency checking is undecidable" means.