Design of a two-level hot path detector for path-based loop optimizations

  • Authors:
  • Takanobu Baba;Tomohisa Masuho;Takashi Yokota;Kanemitsu Ootsu

  • Affiliations:
  • Department of Information Science, Faculty of Engineering, Utsunomiya University, Utsunomiya, Japan;Department of Information Science, Faculty of Engineering, Utsunomiya University, Utsunomiya, Japan;Department of Information Science, Faculty of Engineering, Utsunomiya University, Utsunomiya, Japan;Department of Information Science, Faculty of Engineering, Utsunomiya University, Utsunomiya, Japan

  • Venue:
  • ACST'07 Proceedings of the third conference on IASTED International Conference: Advances in Computer Science and Technology
  • Year:
  • 2007

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Abstract

Aggressive execution-path-based compiler and architecture optimizations require a path profiler that can specify several hottest paths at low overheads. Based on our observation that a limited number of paths are executed frequently in hot loops, we have designed a two-level hot path detector to specify such hottest paths within hot loops. The detector consists of two tables: a filter table and an accumulator table. The filter table captures the behavior of locally hot paths. This hot path information is then sent to the accumulator table to capture the behavior of globally hot paths. The path profiler also provides us with the information on hot loops as well as problematic instructions contained in the hot paths. They may be effectively utilized for the optimizations. We evaluate the profiler using SPEC CINT2000. The results show that the two-level organization has an effect of filtering out less frequent paths, and that the top 5 frequent paths and their order can be adequately detected.