Design Consideration of 6.25 Gbps Signaling for High-Performance Server

  • Authors:

  • Jian Hong Jiang;Weixin Gai;Akira Hattori;Yasuo Hidaka;Takeshi Horie;Yoichi Koyanagi;Hideki Osone

  • Affiliations:

  • Platform Innovation Group, Fujitsu Laboratories of America, Inc., 1240 East Arques Avenue, Sunnyvale;Platform Innovation Group, Fujitsu Laboratories of America, Inc., 1240 East Arques Avenue, Sunnyvale;Platform Innovation Group, Fujitsu Laboratories of America, Inc., 1240 East Arques Avenue, Sunnyvale;Platform Innovation Group, Fujitsu Laboratories of America, Inc., 1240 East Arques Avenue, Sunnyvale;Platform Innovation Group, Fujitsu Laboratories of America, Inc., 1240 East Arques Avenue, Sunnyvale;Platform Innovation Group, Fujitsu Laboratories of America, Inc., 1240 East Arques Avenue, Sunnyvale;Platform Innovation Group, Fujitsu Laboratories of America, Inc., 1240 East Arques Avenue, Sunnyvale

  • Venue:
  • ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
  • Year:
  • 2007

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Abstract

As network data rate increases rapidly, high-speed signaling circuits for server communication pose many design challenges due to various system requirements using different interconnect mediums. This paper discusses main problems and solutions of high-speed circuits for server interconnect. Then, it presents a high-speed circuit implementation for such interconnect using 90nm CMOS technology that achieved data rate at 6.25 Gbps in a backplane environment.