MACAW: a media access protocol for wireless LAN's
SIGCOMM '94 Proceedings of the conference on Communications architectures, protocols and applications
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
CSMA/IC: A New Class of Collision-free MAC Protocols for Ad Hoc Wireless Networks
ISCC '03 Proceedings of the Eighth IEEE International Symposium on Computers and Communications
The feasibility of on-chip interconnection using antennas
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
SYN-MAC: a distributed medium access control protocol for synchronized wireless networks
Mobile Networks and Applications
Bringing communication networks on a chip: test and verification implications
IEEE Communications Magazine
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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To bridge the widening gap between computation requirements and communication efficiency faced by gigascale heterogeneous SoCs in the upcoming ubiquitous era, a new on-chip communication system, dubbed Wireless Network-on-Chip (WNoC), is introduced by using the recently developed CMOS proximity wireless interconnection technology. In this paper, a synchronous and distributed medium access control (SD-MAC) protocol is designed and implemented. Tailored for WNoC, SD-MAC employs a binary countdown approach to resolve channel contention between RF nodes. The receiver_select_sender mechanism and hidden terminal elimination scheme are proposed to increase the throughput and channel utilization of the system. Our simulation study shows the promising performance of SD-MAC in terms of throughput, latency, and network utilization. As a major component of simple and compact RF node design, a MAC unit implements the proposed SDMAC that guarantees correct operation of synchronized frames while keeping overhead low. The synthesis results demonstrate several attractive features such as high speed, low power consumption, nice scalability and low area cost.