Efficient packet classification on network processors

  • Authors:
  • Koert Vlaeminck;Tim Stevens;Wim Van de Meerssche;Filip De Turck;Bart Dhoedt;Piet Demeester

  • Affiliations:
  • Department of Information Technology—IMEC—IBBT, Ghent University, Gaston Crommenlaan 8 bus 201, Gent B-9050, Belgium;Department of Information Technology—IMEC—IBBT, Ghent University, Gaston Crommenlaan 8 bus 201, Gent B-9050, Belgium;Department of Information Technology—IMEC—IBBT, Ghent University, Gaston Crommenlaan 8 bus 201, Gent B-9050, Belgium;Department of Information Technology—IMEC—IBBT, Ghent University, Gaston Crommenlaan 8 bus 201, Gent B-9050, Belgium;Department of Information Technology—IMEC—IBBT, Ghent University, Gaston Crommenlaan 8 bus 201, Gent B-9050, Belgium;Department of Information Technology—IMEC—IBBT, Ghent University, Gaston Crommenlaan 8 bus 201, Gent B-9050, Belgium

  • Venue:
  • International Journal of Communication Systems
  • Year:
  • 2008

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Abstract

Always-on networking and a growing interest in multimedia- and conversational-IP services offer an opportunity to network providers to participate in the service layer, if they increase functional intelligence in their networks. An important prerequisite to providing advanced services in IP access networks is the availability of a high-speed packet classification module in the network nodes, necessary for supporting any IP service imaginable. Often, access nodes are installed in remote offices, where they terminate a large number of subscriber lines. As such, technology adding processing power in this environment should be energy-efficient, whilst maintaining the flexibility to cope with changing service requirements. Network processor units (NPUs) are designed to overcome these operational restrictions, and in this context this paper investigates their suitability for wireline and robust packet classification in a firewalling application. State-of-the-art packet classification algorithms are examined, whereafter the performance and memory requirements are compared for a Binary Decision Diagram (BDD) and sequential search approach. Several space optimizations for implementing BDD classifiers on NPU hardware are discussed and it is shown that the optimized BDD classifier is able to operate at gigabit wirespeed, independent of the ruleset size, which is a major advantage over a sequential search classifier. Copyright © 2007 John Wiley & Sons, Ltd.