Achieving 10Gbps network processing: are we there yet?
HiPC'08 Proceedings of the 15th international conference on High performance computing
A new TCB cache to efficiently manage TCP sessions for web servers
Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
High speed network traffic analysis with commodity multi-core systems
IMC '10 Proceedings of the 10th ACM SIGCOMM conference on Internet measurement
Cache injection for parallel applications
Proceedings of the 20th international symposium on High performance distributed computing
Affinity-aware DMA buffer management for reducing off-chip memory access
Proceedings of the 27th Annual ACM Symposium on Applied Computing
Analyzing performance and power efficiency of network processing over 10 GbE
Journal of Parallel and Distributed Computing
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Sincetheintroductionofthe10GbEstandardin2002,theabilityofgeneralpurposeprocessorstoefficientlyprocessnetworktrafficwithcommonprotocolssuchasTCP/IPhasbeenrevisitedandcriticallyevaluated.However,recentcommerciallyavailableprocessorssuchasIntel®CoreTM2DuoProcessor introduce microarchitectural enhancementsthatcouldsignificantlyinfluencetheapproachtoacceleratingnetworkprocessing.WeexaminethenetworkperformanceofarealplatformcontainingIntel®CoreTMmicro-architecturebasedprocessors,the role of coherency and a prototype implementationofdirectcacheplacement(DirectCacheAccessorDCA)ofinboundnetworktraffic.Weobservethatasubstantialportionofthetimerelatestotheinefficiency of I/O specific coherence protocols in theplatform.Wedemonstratethatarelatively,lowcomplexityimplementationofDCAcalled`PrefetchHint'providesa15to43%speed-uptoreceive-sideprocessingacrossarangeofI/Osizesandpresentadetailed characterization of the benefits.