Advances in Quantum Computing Fault Tolerance and Testing

Authors:
David Y. Feinstein;V. S. S. Nair;Mitchell A. Thornton
Affiliations:
-;-;-
Venue:
HASE '07 Proceedings of the 10th IEEE High Assurance Systems Engineering Symposium
Year:
2007

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Cited 1

Partially redundant logic detection using symbolic equivalence checking in reversible and irreversible logic circuits

Proceedings of the conference on Design, automation and test in Europe

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Abstract

We study recent developments in quantum computing (QC) testing and fault tolerance (FT) techniques and discuss several attempts to formalize quantum logic fault models. We illustrate the inherent need for fault tolerance in QC due to the decoherence problem. Further, we examine several ideas regarding random testing and examine the viability of built-insystem-test (BIST) in future QC circuits.