Parallelizing the Murphi Verifier
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
The Design of a Multicore Extension of the SPIN Model Checker
IEEE Transactions on Software Engineering
Spin model checker, the: primer and reference manual
Spin model checker, the: primer and reference manual
Scalable multi-core LTL model-checking
Proceedings of the 14th international SPIN conference on Model checking software
Towards informed swarm verification
NFM'11 Proceedings of the Third international conference on NASA Formal methods
Boosting multi-core reachability performance with shared hash tables
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
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The broad availability of multi-core chips on standard desktop PCs provides strong motivation for the development of new algorithms for logic model checkers that can take advantage of the additional processing power. With a steady increase in the number of available processing cores, we would like the performance of a model checker to increase as well - ideally linearly. The new trend implies a change of focus away from cluster computers towards shared memory systems. In this paper we discuss the multi-core algorithms that are in development for the SPIN model checker.