Analysis and Design of Analog Integrated Circuits
Analysis and Design of Analog Integrated Circuits
SPICE models for flicker noise in n-MOSFETs from subthreshold to strong inversion
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SPICE models for flicker noise in p-MOSFETs in the saturation region
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.00 |
A new methodology based on the concept of figure of merit under area constraints is described for designing optimum performance dierential amplifiers. First a figure of merit is introduced that includes the three performance parameters, namely, input-referred noise, dierential dc gain, and unity-gain bandwidth. Expressions for these parameters have been derived analytically and finally arrived at an expression for the figure of merit. Next it is shown how these performance parameters vary with the relative allocation of the total available area between the input and load transistors. The figure of merit peaks at a certain value of relative area allocation in the range of 60% to 80% of the available area to the input transistors. The peak value of figure of merit is a function of area. However, it is independent of biasing current (and, therefore, power consumption) subject to the minimum current (and, therefore, a minimum power) required to keep all the transistors biased in the saturation region. The peak figure of merit and minimum power required to achieve the peak figure of merit are also plotted as a function of area. These analyses help in synthesizing optimal dierential amplifier circuit designs under area constraints.