Electronic phase sensitive receiver for railway signalling technology

  • Authors:

  • Martin Poupa

  • Affiliations:

  • Department of Applied Electronics and Telecommunications, University of West Bohemia, Pilsen, Czech Republic

  • Venue:
  • ISCGAV'07 Proceedings of the 7th WSEAS International Conference on Signal Processing, Computational Geometry & Artificial Vision
  • Year:
  • 2007

Quantified Score

Hi-index 0.00

Visualization

Abstract

This article deals with a design of a replacement of an electro mechanic phase sensitive relay type DSS-12. These relays are used by the Czech Railways for detecting the presence of railway vehicles at the rail circuit. The replacement of electro-mechanical phase sensitive relay leads to the design of a special digital signal processing (DSP) system. The input signals must be converted from an analogue signal to a digital representation by A/D converters and further processed by digital signal processing methods. Discrete Fourier transform, an iterative algorithm CORDIC and threshold was used for digital signal processing. The digital signal processing system was implemented in C language and then rewritten to the VHDL language to implement it in the FPGA (Field Programmable Gate Array) device.