A 2 GHz variable gain low noise amplifier in 0.18-μm CMOS

Authors:
Shaikh K. Alam;Joanne Degroat
Affiliations:
Department of Electrical and Computer Engineering, The Ohio State University, Columbus, USA 43210;Department of Electrical and Computer Engineering, The Ohio State University, Columbus, USA 43210
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2008

Citing 2
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Design of a 1.8 GHz low-noise amplifier for RF front-end in a 0.8 μm CMOS technology

IEEE Transactions on Consumer Electronics

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Abstract

This paper describes a 2 GHz active variable gain low noise amplifier (VGLNA) in a 0.18-μm CMOS process. The VGLNA provides a 50-Ω input impedance and utilizes a tuned load to provide high selectivity. The VGLNA achieves a maximum small signal gain of 16.8 dB and a minimum gain of 4.6 dB with good input return loss. In the high gain and the low gain modes, the NFs are 0.83 dB and 2.8 dB, respectively. The VGLNA's IIP3 in the high gain mode is 2.13 dBm. The LNA consumes approximately 4 mA of current from a 1.8-V power supply.