A general approach to connected-component labeling for arbitrary image representations
Journal of the ACM (JACM)
A fast algorithm for local minimum and maximum filters on rectangular and octagonal kernels
Pattern Recognition Letters
Decomposition of Arbitrarily Shaped Morphological Structuring Elements
IEEE Transactions on Pattern Analysis and Machine Intelligence
IEEE Transactions on Pattern Analysis and Machine Intelligence
Sequential Operations in Digital Picture Processing
Journal of the ACM (JACM)
Learning Patterns of Activity Using Real-Time Tracking
IEEE Transactions on Pattern Analysis and Machine Intelligence
W4: Real-Time Surveillance of People and Their Activities
IEEE Transactions on Pattern Analysis and Machine Intelligence
Linear-time connected-component labeling based on sequential local operations
Computer Vision and Image Understanding
A linear-time component-labeling algorithm using contour tracing technique
Computer Vision and Image Understanding
Tracking Multiple Humans in Complex Situations
IEEE Transactions on Pattern Analysis and Machine Intelligence
Digital Image Processing (3rd Edition)
Digital Image Processing (3rd Edition)
Image Analysis and Mathematical Morphology
Image Analysis and Mathematical Morphology
Real-Time Video Segmentation with VGA Resolution and Memory Bandwidth Reduction
AVSS '06 Proceedings of the IEEE International Conference on Video and Signal Based Surveillance
Background segmentation beyond RGB
ACCV'06 Proceedings of the 7th Asian conference on Computer Vision - Volume Part II
A survey on visual surveillance of object motion and behaviors
IEEE Transactions on Systems, Man, and Cybernetics, Part C: Applications and Reviews
A hardware architecture for real-time video segmentation utilizing memory reduction techniques
IEEE Transactions on Circuits and Systems for Video Technology
Binary morphology with spatially variant structuring elements: algorithm and architecture
IEEE Transactions on Image Processing
Hardware/software co-design of a real-time kernel based tracking system
Journal of Systems Architecture: the EUROMICRO Journal
FPGA-based architecture for real time segmentation and denoising of HD video
Journal of Real-Time Image Processing
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This paper presents the design of an embedded automated digital video surveillance system with real-time performance. Hardware accelerators for video segmentation, morphological operations, labeling and feature extraction are required to achieve the real-time performance while tracking will be handled in software in an embedded processor. By implementing a complete embedded system, bottlenecks in computational complexity and memory requirements can be identified and addressed. Accordingly, a memory reduction scheme for the video segmentation unit, reducing bandwidth with more than 70%, and a low complexity morphology architecture that only requires memory proportional to the input image width, have been developed. On a system level, it is shown that a labeling unit based on a contour tracing technique does not require unique labels, resulting in more than 50% memory reduction. The hardware accelerators provide the tracking software with image objects properties, i.e. features, thereby decoupling the tracking algorithm from the image stream. A prototype of the embedded system is running in real-time, 25 fps, on a field programmable gate array development board. Furthermore, the system scalability for higher image resolution is evaluated.