An empirical study of bi-level parallel computing on a PC

  • Authors:

  • Yu-Fai Fung;Wai-Leung Cheung;Gujit Singh;Muhammet F. Ercan

  • Affiliations:

  • Department of Electrical Engineering, The Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong;Department of Electrical Engineering, The Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong;Department of Electrical Engineering, The Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong;School of Electrical and Electronic Engineering, Singapore Polytechnic, Singapore

  • Venue:
  • ICECS'03 Proceedings of the 2nd WSEAS International Conference on Electronics, Control and Signal Processing
  • Year:
  • 2003

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Abstract

Modern microprocessors that are being utilized in commodity personal computers have build-in parallel computing feature. In general, these microprocessors support Single Instruction Multiple Data (SIMD) parallel computing mechanism. Recently, dual-CPU systems are becoming very common and therefore, it is possible to combine the SIMD mechanism and the computing power that comes with two microprocessors to form a cost-effective parallel computing system. In this paper, we describe the methodology of combining two types of parallel processing mechanism and study the performance of such a system empirically.