A 3-V digital-audio sigma-delta modulator in 0.35-µm CMOS

Authors:
Ehsanollah Fathi
Affiliations:
Electrical and Computer Engineering, University of Tehran, Tehran, Iran
Venue:
ICECS'03 Proceedings of the 2nd WSEAS International Conference on Electronics, Control and Signal Processing
Year:
2003

Citing 2
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The design of low-voltage, low-power sigma-delta modulators

The design of low-voltage, low-power sigma-delta modulators
Analysis and Design of Analog Integrated Circuits

Analysis and Design of Analog Integrated Circuits

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Abstract

This paper presents the design of a second-order sigma-delta modulator for digital-audio applications. The modulator has bee designed at 3V power supply with oversampling ratio of 256 and simulated in a 0.35µm CMOS technology. The simulated results give SNDR of 94.52 dB for a 25 KHz signal bandwidth. The sampling frequency is 12.8MHz and the Nyquist rate of the modulator is 50 KHz.