Packet scheduling in broadcast WDM networks with arbitrary transceiver tuning latencies
IEEE/ACM Transactions on Networking (TON)
Broadband Networking: ATM, SDH, and SONET
Broadband Networking: ATM, SDH, and SONET
Stable and Practical Scheduling Algorithms for High Speed Virtual Output Queuing Switches
ISCC '03 Proceedings of the Eighth IEEE International Symposium on Computers and Communications
The Handbook of Optical Communication Networks (Electrical Engineering Handbook Series)
The Handbook of Optical Communication Networks (Electrical Engineering Handbook Series)
Techniques for optical packet switching and optical burst switching
IEEE Communications Magazine
Optical burst switching for service differentiation in the next-generation optical Internet
IEEE Communications Magazine
Packet-level traffic measurements from the Sprint IP backbone
IEEE Network: The Magazine of Global Internetworking
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Electrical-to-optical domain conversions and vice versa (denoted by O/E/O conversions) for each hop in optical core transport networks impose considerable capital and financial overhead on the providers. In this paper, we propose a full-mesh topology driven core network with a central scheduler that handles the task of signaling and coordination among slot transmissions for every hop to eliminate such O/E/O conversions. We introduce the concept of a container as a macro data unit that forms a separate layer in the protocol stack above the optical layer. A FAST centralized scheduling algorithm is proposed based on a preemptive scheduling technique that can ensure that there are no collisions between the containers. We also analyze the complexity of this algorithm. Next we design the logical architecture for the core and edge switches following the de facto policy of moving the complexity to the edge. We also designed a hierarchical architecture for the edge switch and provide the respective block diagrams. To get a more concrete design prototype, we further proposed a generic (vendor independent) physical architecture for a single port of the switch considering SONET/SDH on the access side. Moreover, we develop a concise delay model for the containers to analyze the packet arrival process and derive the optimal container size, based on the link speed. Finally, we present some simulation results to study the performance of the algorithms and models proposed in our work.