A survey of CORDIC algorithms for FPGA based computers
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
OFDM for Wireless Multimedia Communications
OFDM for Wireless Multimedia Communications
Evaluation of CORDIC Algorithms for FPGA Design
Journal of VLSI Signal Processing Systems
The use of CORDIC in software defined radios: a tutorial
IEEE Communications Magazine
Journal of Signal Processing Systems
FPGA-implementation of atan(Y/X) based on logarithmic transformation and LUT-based techniques
Journal of Systems Architecture: the EUROMICRO Journal
FPGA implementation of an OFDM-based WLAN receiver
Microprocessors & Microsystems
Low Complexity Time Synchronization Algorithm for OFDM Systems with Repetitive Preambles
Journal of Signal Processing Systems
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In an orthogonal frequency division multiplexing-based wireless local area network receiver there are three operations that can be performed by a unique coordinate rotation digital computer (CORDIC) processor since they are needed in different time instants. These are the rotation of a vector, the computation of the angle of a vector and the computation of the reciprocal. This paper proposes a common architecture of CORDIC algorithm suitable to implement the three operations with a reduced increase of the hardware cost with respect to a single operation CORDIC. The proposed architecture has been validated on field programmable gate-arrays devices and the results of the implementation show that area saving around 28% and throughput increment of 64% are obtained.