Two digitally programmable gain amplifiers based on current conveyors
Analog Integrated Circuits and Signal Processing
A class of digitally programmable nth-order filters
International Journal of Circuit Theory and Applications
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Two highly linear, digitally programmable gain amplifiers are presented and compared in terms of linearity, frequency, area and power consumption. High linearity and wide gain tuning range with moderate area consumption are the main benefits of both configurations. Furthermore, constant bandwidth is achieved by means of switched compensation capacitor arrays. Three-bit prototypes were integrated in a 0.35 µm–3.3 V CMOS process with 2.5 V supply voltage. Experimental distortion levels are better than -68 dB for 1 MHz and 1 Vp-p output signals in both configurations; hence, the suitability of the linearization technique based on MOS current dividers is shown. Copyright © 2007 John Wiley & Sons, Ltd.