Support for symmetric shadow memory in multiprocessors

  • Authors:
  • Vijay Nagarajan;Rajiv Gupta

  • Affiliations:
  • Univ. of California at Riverside, Riverside, CA;Univ. of California at Riverside, Riverside, CA

  • Venue:
  • PADTAD '08 Proceedings of the 6th workshop on Parallel and distributed systems: testing, analysis, and debugging
  • Year:
  • 2008

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Abstract

Runtime monitoring support serves as a foundation for the important tasks of providing security [15, 14, 2], performing debugging [13, 11, 8], and improving performance of applications [1]. Runtime monitoring, typically, requires the maintenance of meta data associated with each of the application's original memory location, which are held in corresponding shadow memory locations. Each original memory instruction (OMI) is then accompanied by additional shadow memory instructions (SMIs) that manipulate the meta data associated with the memory location. Often the SMIs associated with OMIs are symmetric, in that, original stores (loads) are accompanied by shadow stores (loads). Unfortunately, existing shadow memory implementations need thread serialization to ensure that OMIs and SMIs are executed atomically [12]. Naturally this is not an efficient approach, especially in the now ubiquitous multiprocessors. In this paper, we present an efficient shadow memory implementation that handles symmetric shadow instructions. By coupling the coherency of shadow memory with the coherency of the main memory, we ensure that the SMIs execute atomically with their corresponding OMIs. We also couple the allocation of application memory pages with its associated shadow pages, for enabling fast translation of original addresses into corresponding shadow memory addresses. Our experiments show that the overheads of run-time monitoring tasks are significantly reduced in comparison to previous software implementations.