Memory and Thread Placement Effects as a Function of Cache Usage: A Study of the Gaussian Chemistry Code on the SunFire X4600 M2

Authors:
R. Yang;J. Antony;P. P. Janes;A. P. Rendell
Affiliations:
-;-;-;-
Venue:
ISPAN '08 Proceedings of the The International Symposium on Parallel Architectures, Algorithms, and Networks
Year:
2008

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Abstract

In this work we study the effect of cache blocking and memory/thread placement on a modern multicore shared memory parallel system, the SunFire X4600 M2, using the Gaussian 03 computational chemistry code. A protocol for performing memory and thread placement studies is outlined, as is a scheme for characterizing a particular memory and thread placement pattern. Results for parallel Gaussian 03 runs with up to 16 threads are presented.