Parallel Algorithm Design with Coarse-Grained Synchronization
ICCS '01 Proceedings of the International Conference on Computational Science-Part II
FOCS '99 Proceedings of the 40th Annual Symposium on Foundations of Computer Science
Algorithms for memory hierarchies: advanced lectures
Algorithms for memory hierarchies: advanced lectures
ACM Transactions on Algorithms (TALG)
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The authors introduce a model, called the uniform memory hierarchy (UMH) model, which reflects the hierarchical nature of computer memory more accurately than the RAM (random-access-machine) model, which assumes that any item in memory can be accessed with unit cost. In the model memory occurs as a sequence of increasingly large levels. Data are transferred between levels in fixed-size blocks (the size is level dependent). Within a level blocks are random access. The model is easily extended to handle parallelism. The UMH model is really a family of models parameterized by the rate at which the bandwidth decays as one travels up the hierarchy. A program is parsimonious on a UMH if the leading terms of the program's (time) complexity on the UMH and on a RAM are identical. If these terms differ by more than a constant factor, then the program is inefficient. The authors analyze two standard FFT programs with the same RAM complexity. One is efficient; the other is not.