Analog hardware implementation of a vector quantizer for focal-plane image compression

  • Authors:
  • Hugo de Lemos Haas;José Gabriel Rodriguez Carneiro Gomes;Antonio Petraglia

  • Affiliations:
  • COPPE/UFRJ, Rio de Janeiro, Brazil;COPPE/UFRJ, Rio de Janeiro, Brazil;COPPE/UFRJ, Rio de Janeiro, Brazil

  • Venue:
  • Proceedings of the 21st annual symposium on Integrated circuits and system design
  • Year:
  • 2008

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Abstract

We propose the use of a low-complexity vector quantizer for coding data vectors at the focal plane of CMOS image sensors, directly from analog pixels samples prior to A/D conversion. To be suitable for focal-plane image compression applications, the encoder must have a very low transistor count. Without considering the implementation errors in DPCM preprocessing of the image data, a test image is compressed by the proposed vector quantizer with peak signal-to-noise ratio around 26 dB at 0.73 bpp. The vector quantizer requires 145 transistors for each block of 4x4 pixels, and Monte Carlo simulation results in Cadence/Spectre led to the same image compression results that had been achieved in theoretical predictions.