A 0.35 μm CMOS AM demodulator

Authors:
Pietro M. Ferreira;Fernando A. Barúqui;Antonio Petraglia
Affiliations:
Program of Electrical Engineering - EPOLI,COPPE-UFRJ, Federal University of Rio de Janeiro, Rio de Janeiro, Brazil 21941-972;Program of Electrical Engineering - EPOLI,COPPE-UFRJ, Federal University of Rio de Janeiro, Rio de Janeiro, Brazil 21941-972;Program of Electrical Engineering - EPOLI,COPPE-UFRJ, Federal University of Rio de Janeiro, Rio de Janeiro, Brazil 21941-972
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2008

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CMOS: Circuit Design, Layout, and Simulation (IEEE Press Series on Microelectronic Systems)

CMOS: Circuit Design, Layout, and Simulation (IEEE Press Series on Microelectronic Systems)

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Abstract

This paper presents a 0.35 μm CMOS AM demodulator circuit. Design details, simulations and measurements results of the monolithic implementation of a highly accurate synchronous rectifier are shown. The circuit implements an envelope detector with a 卤1.5 V output swing on a 15 pF load. It dissipates 15 mW from a 卤2.5 V voltage supply, and presents SNR = 81 dB measured at a THD = 驴40 dB for an input signal having 100% modulation index.