The PowerPC architecture: a specification for a new family of RISC processors
The PowerPC architecture: a specification for a new family of RISC processors
The dawning of the autonomic computing era
IBM Systems Journal
Dynamic reconfiguration of CPU and WebSphere on IBM pSeries servers
Software—Practice & Experience
POWER5 System microarchitecture
IBM Journal of Research and Development - POWER5 and packaging
Hi-index | 0.00 |
This paper investigates the computational characteristics of the software applications that are developed to support typical modern e-commerce applications. These applications have a significant impact on global commerce, and their influence is expected to continue. We show that the micro-architectural features of the memory subsystem, assisted by the operating system (such as the use of concurrent pageable page sizes), can significantly improve the performance of these applications. In particular, we show that using 64 kB page size in addition to the default 4 kB page size provides substantial throughput improvements for a typical commercial application (Trade6) without adding any complexity for the application developer or the system administrator. Copyright © 2007 John Wiley & Sons, Ltd.