IDEA cryptographic processor in FPGA

  • Authors:
  • Parimal Patel;Chirag Parikh

  • Affiliations:
  • Department of Electrical Engineering, University of Texas at San Antonio, 6900 North Loop 1604 West, San Antonio, TX 78249, USA. E-mail: ppatel@utsa.edu;Department of Electrical Engineering, University of Texas at San Antonio, 6900 North Loop 1604 West, San Antonio, TX 78249, USA. E-mail: ppatel@utsa.edu

  • Venue:
  • Journal of Computational Methods in Sciences and Engineering - Selected papers from the International Conference on Computer Science,Software Engineering, Information Technology, e-Business, and Applications, 2003
  • Year:
  • 2005

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Abstract

In modern systems, data security is needed more than ever before as it helps in keeping private data private. In today's world where data communications, distributed data processing, financial transactions, and multilevel sharing of data resources has become an important aspect of computer system and an integral part of day-to-day function, cryptography is the only way of ensuring data security. Many algorithms exist which can be categorized as Symmetric or Asymmetric algorithms. This paper presents International Data Encryption Algorithm (IDEA) - its advantages, disadvantages, hardware implementation considerations in Field Programmable Gate Arrays (FPGA), resource utilization and achievable performance. The algorithm analysis and the optimization techniques used are described. Implementation results are compared to the commercial implementation solutions.