A rigorous methodology for security architecture modeling and verification

• Authors: Yomna Ali;Sherif El-Kassas
• Venue: Proceedings of the 4th annual workshop on Cyber security and information intelligence research: developing strategies to meet the cyber security and information intelligence challenges ahead
• Year: 2008

Few attempts have been made at defining a formal and traceable relationship for integrating security in all phases of analysis, modeling, and verification of software systems. In this paper, we propose a rigorous methodology for utilizing threat modeling in building secure software architectures using SAM (Software Architecture Modeling framework) and verifying them formally using Symbolic Model Checking. Security mitigations suggested by the threat model are expressed as constraints over a high-level SAM model and are used to refine it into a secure constrained model. We also, propose a translation from SAM Secure models into the SMV model checker where the threats and the elicited security properties from the threat modeling process are used as inputs to the verification phase as well. This method is developed with the aim of bridging the gap between informal security requirements and their formal representation and verification.