Good error-correcting codes based on very sparse matrices
IEEE Transactions on Information Theory
Design of capacity-approaching irregular low-density parity-check codes
IEEE Transactions on Information Theory
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recent researches have shown that in designing the LDPC coding systems, optimizing the code's performance from the error correction view, makes the implementation of decoder and encoder circuits difficult. Also emphasizing on simplifying the decoder and encoder circuits will reduce the code's performance. Therefore in the design process of an LDPC code, the code's performance and implementation constraints must be considered simultaneously. In this paper first the parity-check matrix is introduced; which helps reducing the complexity of the encoder circuit and also provides the opportunity of parallel implementation of the decoder circuit. Then the block-filling method for increasing the error correction performance is introduced and its operations on the parity-check matrix are discussed and simulated.