Design and evaluation of a compiler algorithm for prefetching
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
Making B+- trees cache conscious in main memory
SIGMOD '00 Proceedings of the 2000 ACM SIGMOD international conference on Management of data
ACM Computing Surveys (CSUR)
Optimizing multidimensional index trees for main memory access
SIGMOD '01 Proceedings of the 2001 ACM SIGMOD international conference on Management of data
Compacting discriminator information for spatial trees
ADC '02 Proceedings of the 13th Australasian database conference - Volume 5
Fractal prefetching B+-Trees: optimizing both cache and disk performance
Proceedings of the 2002 ACM SIGMOD international conference on Management of data
R-trees: a dynamic index structure for spatial searching
SIGMOD '84 Proceedings of the 1984 ACM SIGMOD international conference on Management of data
Cache Conscious Indexing for Decision-Support in Main Memory
VLDB '99 Proceedings of the 25th International Conference on Very Large Data Bases
A Cache Optimized Multidimensional Index in Disk-Based Environments*
IEICE - Transactions on Information and Systems
Buffering accesses to memory-resident index structures
VLDB '03 Proceedings of the 29th international conference on Very large data bases - Volume 29
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Recently, researches have been performed on a general method that can improve the cache performance of the R-Tree in the main memory to reduce the size of an entry so that a node can store more entries. However, this method generally requires additional processes to reduce information of entries. In addition, the cache miss always occurs on moving between a parent node and a child node. To solve these problems, this paper proposes the SPR-Tree (Selective Prefetching R-Tree), which is an extended R-Tree indexing method using selective prefetching according to node size in the main memory. The SPR-Tree can produce wider nodes to optimize prefetching without additional modifications on the R-Tree. Moreover, the SPR-Tree can reduce the cache miss that can occur in the R-Tree. In our simulation, the search, insert, and delete performance of the SPR-Tree improved up to 40%, 10%, 30% respectively, compared with the R-Tree.