Hardware Design of an Adaptive Neuro-fuzzy Network with On-Chip Learning Capability

Authors:
Tzu-Ping Kao;Chun-Chang Yu;Ting-Yu Chen;Jeen-Shing Wang
Affiliations:
Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan, R.O.C;Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan, R.O.C;Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan, R.O.C;Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan, R.O.C
Venue:
ISNN '07 Proceedings of the 4th international symposium on Neural Networks: Part II--Advances in Neural Networks
Year:
2007

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Abstract

This paper aims for the development of the digital circuit of an adaptive neuro-fuzzy network with on-chip learning capability. The on-chip learning capability was realized by a backpropagation learning circuit for optimizing the network parameters. To maximize the throughput of the circuit and minimize its required resources, we proposed to reuse the computational results in both feedforward and backpropagation circuits. This leads to a simpler data flow and the reduction of resource consumption. To verify the effectiveness of the circuit, we implemented the circuit in an FPGA development board and compared the performance with the neuro-fuzzy system written in a MATLAB®code. The experimental results show that the throughput of our neuro-fuzzy circuit significantly outperforms the NF network written in a MATLAB®code with a satisfactory learning performance.