ACM Transactions on Programming Languages and Systems (TOPLAS)
Submodule Construction for Specifications with Input Assumptions and Output Guarantees
FORTE '02 Proceedings of the 22nd IFIP WG 6.1 International Conference Houston on Formal Techniques for Networked and Distributed Systems
Generating Synchronizable Test Sequences Based on Finite State Machine with Distributed Ports
Proceedings of the IFIP TC6/WG6.1 Sixth International Workshop on Protocol Test systems VI
Realizability and verification of MSC graphs
Theoretical Computer Science - Automata, languages and programming
Realizability of Collaboration-based Service Specifications
APSEC '07 Proceedings of the 14th Asia-Pacific Software Engineering Conference
Non-local choice and beyond: intricacies of MSC choice nodes
FASE'05 Proceedings of the 8th international conference, held as part of the joint European Conference on Theory and Practice of Software conference on Fundamental Approaches to Software Engineering
Realizability criteria for compositional MSC
AMAST'06 Proceedings of the 11th international conference on Algebraic Methodology and Software Technology
Testing input/output partial order automata
TestCom'07/FATES'07 Proceedings of the 19th IFIP TC6/WG6.1 international conference, and 7th international conference on Testing of Software and Communicating Systems
TESTCOM '09/FATES '09 Proceedings of the 21st IFIP WG 6.1 International Conference on Testing of Software and Communication Systems and 9th International FATES Workshop
Implementing MSC Tests with Quiescence Observation
TESTCOM '09/FATES '09 Proceedings of the 21st IFIP WG 6.1 International Conference on Testing of Software and Communication Systems and 9th International FATES Workshop
Performance modeling of distributed collaboration services
Proceedings of the 2nd ACM/SPEC International Conference on Performance engineering
The complexity of asynchronous model based testing
Theoretical Computer Science
Conformance relations for labeled event structures
TAP'12 Proceedings of the 6th international conference on Tests and Proofs
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An Input/Output Automaton is an automaton with a finite number of states where each transition is associated with a single inpufor output interaction. In [1], we introduced a new formalism, in which each transition is associated with a bipartite partially ordered set made of concurrent inputs followed by concurrent outputs. In this paper, we generalize this model to Partial Order Input/Output Automata (POIOA), in which each transition is associated with an almost arbitrary partially ordered set of inputs and outputs. This formalism can be seen as High-Level Messages Sequence Charts with inputs and outputs and allows for the specification of concurrency between inputs and outputs in a very general, direct and concise way. We give a formal definition of this framework, and define several conformance relations for comparing system specifications expressed in this formalism. Then we show how to derive a test suite that guarantees to detect faults defined by a POIOA-specific fault model: missing output faults, unspecified output faults, weaker precondition faults, stronger precondition faults and transfer faults.