Ladder Metamodeling and PLC Program Validation through Time Petri Nets

Authors:
Darlam Fabio Bender;Benoît Combemale;Xavier Crégut;Jean Marie Farines;Bernard Berthomieu;François Vernadat
Affiliations:
Institut de Recherche en Informatique de Toulouse (CNRS UMR 5505), Université de Toulouse., France and Departamento de Automação e Sistemas, Federal University of Santa Catarina., F ...;Institut de Recherche en Informatique de Toulouse (CNRS UMR 5505), Université de Toulouse., France;Institut de Recherche en Informatique de Toulouse (CNRS UMR 5505), Université de Toulouse., France;Departamento de Automação e Sistemas, Federal University of Santa Catarina., Florianopolis, Brazil;Laboratoire d'Analyse et d'Archicteture des Systemes (CNRS), Université de Toulouse., France;Laboratoire d'Analyse et d'Archicteture des Systemes (CNRS), Université de Toulouse., France
Venue:
ECMDA-FA '08 Proceedings of the 4th European conference on Model Driven Architecture: Foundations and Applications
Year:
2008

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Abstract

Ladder Diagram (LD) is the most used programming language for Programmable Logical Controllers (PLCs). A PLC is a special purpose industrial computer used to automate industrial processes. Bugs in LD programs are very costly and sometimes are even a threat to human safety. We propose a model driven approach for formal verification of LD programs through model-checking. We provide a metamodel for a subset of the LD language. We define a time Petri net (TPN) semantics for LD programs through an ATL model transformation. Finally, we automatically generate behavioral properties over the LD models as LTL formulae which are then checked over the generated TPN using the model-checkers available in the Tina toolkit. We focus on race condition detection.