Power and Latency Optimized Deadlock-Free Routing Algorithm on Irregular 2D Mesh NoC using LBDRe
International Journal of Embedded and Real-Time Communication Systems
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In this paper, a degree priority routing algorithm is proposed to minimize the hardware cost for nonregular mesh network-on-chip. In the algorithm, the routing path is dynamically selected with respective to the communication status of the next hop node. The next hop node concluded by the degree priority routing different with them obtained by routing algorithm are inserted in the routing table. And, the items in the routing table that have the same contents are combined to further minimize the area and power. Experimental results show that the proposed algorithm has better performance than other three routing algorithms.