Networks-on-chip in emerging interconnect paradigms: Advantages and challenges
NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
A scalable micro wireless interconnect structure for CMPs
Proceedings of the 15th annual international conference on Mobile computing and networking
Hybrid wireless Network on Chip: a new paradigm in multi-core design
Proceedings of the 2nd International Workshop on Network on Chip Architectures
Outstanding research problems in NoC design: system, microarchitecture, and circuit perspectives
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Energy efficiency of error control coding in intra-chip RF/wireless interconnect systems
Microelectronics Journal
A Low-Cost Deadlock-Free Design of Minimal-Table Rerouted XY-Routing for Irregular Wireless NoCs
NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
Complex network inspired fault-tolerant NoC architectures with wireless links
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Design of multi-channel wireless NoC to improve on-chip communication capacity
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
CMOS compatible many-core noc architectures with multi-channel millimeter-wave wireless links
Proceedings of the great lakes symposium on VLSI
Sustainable multi-core architecture with on-chip wireless links
Proceedings of the great lakes symposium on VLSI
Performance evaluation and design trade-offs for wireless network-on-chip architectures
ACM Journal on Emerging Technologies in Computing Systems (JETC)
High-throughput differentiated service provision router architecture for wireless network-on-chip
International Journal of High Performance Systems Architecture
A load-balanced congestion-aware wireless network-on-chip design for multi-core platforms
Microprocessors & Microsystems
Complex network-enabled robust wireless network-on-chip architectures
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Multi-hop communications on wireless network-on-chip using optimized phased-array antennas
Computers and Electrical Engineering
METEOR: Hybrid photonic ring-mesh network-on-chip for multicore architectures
ACM Transactions on Embedded Computing Systems (TECS) - Special Issue on Design Challenges for Many-Core Processors, Special Section on ESTIMedia'13 and Regular Papers
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To bridge the widening gap between computation requirements and communication efficiency faced by gigascale heterogeneous SoCs in the upcoming ubiquitous era, a new on-chip communication system, dubbed Wireless Network-on-Chip (WNoC), is introduced by using the recently developed CMOS UWB wireless interconnection technology. In this paper, a synchronous and distributed medium access control (SD-MAC) protocol is designed and implemented. Tailored for WNoC, SD-MAC employs a binary countdown approach to resolve channel contention between RF nodes. The receiver_select_sender mechanism and hidden terminal elimination scheme are proposed to increase the throughput and channel utilization of the system. Our simulation study shows the promising performance of SD-MAC in terms of throughput, latency, and network utilization. We further propose a QoS-aware SD-MAC to ensure the serviceability of the entire system and to improve the bandwidth utilization. As a major component of simple and compact RF node design, a MAC unit implements the proposed SD-MAC that guarantees correct operation of synchronized frames while keeping overhead low. The synthesis results demonstrate several attractive features such as high speed, low power consumption, nice scalability and low area cost.