Verification and Implementation of Dependable Controllers

  • Authors:
  • Krzysztof Sacha

  • Affiliations:
  • -

  • Venue:
  • DEPCOS-RELCOMEX '08 Proceedings of the 2008 Third International Conference on Dependability of Computer Systems DepCoS-RELCOMEX
  • Year:
  • 2008

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Abstract

A method is described for modeling, verification and automatic generation of code for PLC controllers. The modeling of requirements and the implementation of code are based on a definition of a finite state time machine. The verification process uses UPPAAL, a model checking tool for the networks of timed automata. A conversion between both models is done automatically. The method starts from modeling the desired behavior of the controller by means of an UML-based state machine diagram, and ends-up with a complete program in one of the IEC 1131 languages.