I/O Overhead and Parallel VLSI Architectures for Lattice Computations

  • Authors:
  • Mark H. Nodine;Daniel P. Lopresti;Jeffrey S. Vitter

  • Affiliations:
  • -;-;-

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 1991

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Abstract

The authors introduce input/output (I/O) overhead psi as a complexity measure for VLSI implementations of two-dimensional lattice computations of the type arising in the simulation of physical systems. It is shown by pebbling arguments that psi = Omega (n/sup -1/) when there are n/sup 2/ processing elements available. If the results must be observed at every generation and if no on-chip storage is allowed, the lower bound is the constant 2. The authors then examine four VLSI architectures and show that one of them, the multigeneration sweep architecture also has I/O overhead proportional to n/sup -1/. A closed-form for the discrete minimization equation giving the optimal number of generations to compute for the multigeneration sweep architecture is proved.