Power reduction of asynchronous logic circuits using activity detection
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A low-latency adaptive asynchronous interconnection network using bi-modal router nodes
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
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This paper describes a method of synthesising asynchronous circuits based on the Handshake Circuit paradigm but employing a data-driven, rather than the control-driven, style. This approach attempts to combine the performance advantages of data-driven ...