An unsupervised neural network approach for automatic semiconductor wafer defect inspection

  • Authors:

  • Chuan-Yu Chang;ChunHsi Li;Jia-Wei Chang;MuDer Jeng

  • Affiliations:

  • Department of Electronic Engineering, National Yunlin University of Science and Technology, Yunlin 640, Taiwan, ROC;Department of Electrical Engineering, National Taiwan Ocean University, Keelung, Taiwan, ROC;Department of Electronic Engineering, National Yunlin University of Science and Technology, Yunlin 640, Taiwan, ROC;Department of Electrical Engineering, National Taiwan Ocean University, Keelung, Taiwan, ROC

  • Venue:
  • Expert Systems with Applications: An International Journal
  • Year:
  • 2009

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Abstract

Semiconductor wafer defect inspection is an important process before die packaging. The defective regions are usually identified through visual judgment with the aid of a scanning electron microscope. Dozens of people visually check wafers and hand-mark their defective regions. Consequently, potential misjudgment may be introduced due to human fatigue. In addition, the process can incur significant personnel costs. Prior work has proposed automated visual wafer defect inspection that is based on supervised neural networks. Since it requires learned patterns specific to each application, its disadvantage is the lack of product flexibility. Self-organizing neural networks (SONNs) have been proven to have the capabilities of unsupervised auto-clustering. In this paper, an automatic wafer inspection system based on a self-organizing neural network is proposed. Based on real-world data, experimental results show, with good performance, that the proposed method successfully identifies the defective regions on wafers.