Performance of partial parallel interference cancellation with MC-CDMA transmission techniques for power line communication systems

  • Authors:
  • Yung-Fa Huang;Tan-Hsu Tan;Chia-Hsin Cheng;Neng-Chung Wang

  • Affiliations:
  • Department of Information and Communication Engineering, Chaoyang University of Technology, Taiwan;Department of Electrical Engineering, National Taipei University of Technology, Taiwan;Department of Information and Communication Engineering, Chaoyang University of Technology, Taiwan;Department of Computer Science and Information Engineering, National United University, Taiwan

  • Venue:
  • WSEAS TRANSACTIONS on COMMUNICATIONS
  • Year:
  • 2008

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Abstract

In this paper, we describe and evaluate multistage partial parallel interference cancellation (PPIC) multiuser detectors to improve the performance of multi-carrier direct-sequence code-division multiple-access (MC-CDMA) power line communication (PLC) systems over frequency selective fading channels with nonperfect power control. To improve the effectiveness of PPIC, we examined the adequate partial cancellation weights (PCWs) for the PPIC. Thus, the performance improvement in MC-CDMA based PLC systems using PPIC multiuser detectors is investigated. The high data rate demanded in the multimedia PLC systems can be offered by the MC-CDMA systems. However, the multiple access interferences (MAIs) exist in the frequency selective fading channels for the down link even though using an orthogonal pseudo-random noise (PN) code and occur for the up link due to the non-orthogonal spreading codes. In the high system load, the MAIs become the dominant factor degrading the performance. Therefore, the performance of a multistage PPIC is further investigated for the MC-CDMA PLC systems. Simulation results show that with adequate cancellation weights, the PPIC scheme can obtain a superior performance than the conventional PIC scheme, especially at heavy system load. Furthermore, with the bit-error rate (BER) requirements of 0.001, the five-stage PPIC with PCWs, 0.7, 0.8, 0.9 and 1 for stage 2, 3, 4 and 5, respectively, increases the capacity from 15 of CPIC to 19 users with the processing gain 32 over the power line channels.