Formal Procedures for Connecting Terminals with a Minimum Total Wire Length
Journal of the ACM (JACM)
Computer-Aided Preliminary Layout Design of Customized MOS Arrays
IEEE Transactions on Computers
Engineering for systems using large scale integration
AFIPS '68 (Fall, part I) Proceedings of the December 9-11, 1968, fall joint computer conference, part I
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The efficient placement of components has taken on increased importance because of microminiaturization techniques. Packaging techniques are permitting higher density of components. As the components are mounted closer and closer, less and less room becomes available between components for interconnections. Under these circumstances, the layout of circuitry becomes a difficult and time consuming task for the designer. One approach often used by designers is to group together elements which are functionally related so as to reduce the length of interconnections. If the designer could place the elements in such a way that every element connects only to its nearest neighbors, the problem of routing the interconnections would be somewhat simplified.