A fully integrated 23.2dBm P1dB CMOS power amplifier for the IEEE 802.11a with 29% PAE

  • Authors:

  • Héctor Solar;Roc Berenguer;Joaquín de No;Iñaki Gurutzeaga;Unai Alvarado;Jon Legarda

  • Affiliations:

  • CEIT, Manuel Lardizábal 15, 20018 San Sebastián, Spain and Tecnun (University of Navarra), Manuel Lardizábal 13, 20018 San Sebastián, Spain;CEIT, Manuel Lardizábal 15, 20018 San Sebastián, Spain and Tecnun (University of Navarra), Manuel Lardizábal 13, 20018 San Sebastián, Spain;Tecnun (University of Navarra), Manuel Lardizábal 13, 20018 San Sebastián, Spain;Tecnun (University of Navarra), Manuel Lardizábal 13, 20018 San Sebastián, Spain;CEIT, Manuel Lardizábal 15, 20018 San Sebastián, Spain;CEIT, Manuel Lardizábal 15, 20018 San Sebastián, Spain and Tecnun (University of Navarra), Manuel Lardizábal 13, 20018 San Sebastián, Spain

  • Venue:
  • Integration, the VLSI Journal
  • Year:
  • 2009

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Abstract

A two-stage fully integrated power amplifier (PA) for the 802.11a standard is presented. The PA has been fabricated using UMC 0.18@mm CMOS technology. Measurement results show a power gain of 21.1dB, a P"1"d"B of 23.2dBm and a P"S"A"T of 26.8dBm. The PAE is 29% and it is kept high by means of several integrated inductors. These inductors present low-DC resistance and high Q characteristics. The inductors must include extra design considerations in order to withstand the high-current levels flowing through them, so that they have been called power inductors.