A hardware implementation of gridless routing based on content addressable memory

Authors:
Masao Sato;Kazuto Kubota;Tatsuo Ohtsuki
Affiliations:
Department of Information Engineering, Takushoku University, Tokyo 193, Japan;Department of Electronics and Communication Engineering, Waseda University, Tokyo 160, Japan;Department of Electronics and Communication Engineering, Waseda University, Tokyo 160, Japan
Venue:
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Year:
1991

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Abstract

A new gridless router accelerated by Content Addressable Memory (CAM) is presented. A gridless version of the line-expansion algorithm is implemented, which always finds a path if one exists. The router runs in linear time by means of the CAM-based accelerator. Experimental results show that the more obstacles there are in the routing region, the more effective the CAM-based approach is.