Effects of scheduling on file memory operations
AFIPS '67 (Spring) Proceedings of the April 18-20, 1967, spring joint computer conference
ACM Computing Surveys (CSUR)
The Piecewise Data Flow Architecture: Architectural Concepts
IEEE Transactions on Computers
The Burroughs Scientific Processor (BSP)
IEEE Transactions on Computers
Supersystems: Technology and Architecture
IEEE Transactions on Computers
Scheduling Trees in Parallel/Pipelined Processing Environments
IEEE Transactions on Computers
Pipelining: the generalized concept and sequencing strategies
AFIPS '74 Proceedings of the May 6-10, 1974, national computer conference and exposition
Efficiency in generalized pipeline networks
AFIPS '74 Proceedings of the May 6-10, 1974, national computer conference and exposition
Adaptable pipeline system with dynamic architecture
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Architectures for supersystems of the '80s
AFIPS '80 Proceedings of the May 19-22, 1980, national computer conference
Flats, a machine for numerical, symbolic and associative computing
IJCAI'79 Proceedings of the 6th international joint conference on Artificial intelligence - Volume 2
New abstractions for data parallel programming
HotPar'09 Proceedings of the First USENIX conference on Hot topics in parallelism
Parallelism and Array Processing
IEEE Transactions on Computers
An Instruction Fetch Unit for a High-Performance Personal Computer
IEEE Transactions on Computers
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Early in 1966, a large computer development program was begun by Texas Instruments. The goal for this effort was to provide needed capacity for supporting seismic processing, plus offering a general super computer capability in the support of new markets.