International Journal of Reconfigurable Computing - Special issue on selected papers from the international workshop on reconfigurable communication-centric systems on chips (ReCoSoC' 2010)
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Power analysis is an important and efficient mean for side channel attacks on security applications. By monitoring devices' power consumption during various operations it is possible to collect security information(e.g. the encryption key). These power drop-offs counter effects could be reduced or even eliminated, if accurate power estimations could be achieved on the early design cycles. It is crucial for the designers, to be able to evaluate accurately the power consumption during the development process, especially for the widely used, power consuming, security algorithms. This paper presents and compares the estimated and measured power consumption of security algorithms on both Xilinx and Altera FPGAs. The estimation numbers are produced using each vendor's commercial power estimation tool.The differences between measured and estimated power consumption, varied from 15.52\% to 208\% for the Xilinx devices and from 5.64\% to 32.15\% for the Altera device.As a result, although Altera's PowerPlay power estimation tool gene/rated more accurate results than Xilinx's Xpower tool, none of them seems to be yet mature enough for the very demanding security era.