A computer architecture for large (distributed) data bases
VLDB '75 Proceedings of the 1st International Conference on Very Large Data Bases
Keeping pace with a single-chip 16-bit microprocessor
AFIPS '75 Proceedings of the May 19-22, 1975, national computer conference and exposition
Charge-coupled devices for memory applications
AFIPS '75 Proceedings of the May 19-22, 1975, national computer conference and exposition
AFIPS '75 Proceedings of the May 19-22, 1975, national computer conference and exposition
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The ability to achieve significant amounts of mass memory has not been matched with a capability for processing data stored within the mass memory. The concept of a dedicated data base processor that would implement microprogrammed data base primitives with high speed microprocessor technology appears to be a plausible means of obtaining higher performance data base processing systems. The premise of this concept is that simple operations that manipulate data base information can be included in a separate, simply structured processor that operates in parallel with the central system. In doing so, parallel execution benefits are realized that could lead to higher system performance levels. The technology that supports the dedicated data base processor concept, system architectural considerations, the application of the concept to both distributed and centralized systems, and areas of needed research are described in this paper.